The design, development and manufacturing efforts pertaining to semiconductor integrated circuits involve the understanding of complex structures, processes and manufacturing techniques involving smaller and smaller electronic circuitry. Efforts to be able to achieve such understanding and establish successful design, development and production manufacturing of such integrated circuits involve many man-hours of highly skilled professionals and considerable expense.
On the other hand, to avoid costly man-hours and other significant expenses some developers resort to reverse engineering practices wherein existing devices are taken apart, probed and otherwise examined to determine the physical structures of the resultant integrated circuit under review for subsequent copying. This reverse engineering, which typically relies primarily on obtaining planar optical image of the circuit, in essence attempts to by-pass typical product development efforts and expenses by studying and copying a competitive product.
Various approaches have been developed in an attempt to thwart such reverse engineering efforts, particularly in the field of semiconductor integrated circuits. For example, in U.S. Pat. No. 4, 583,011 issued to Pechar, a pseudo-MOS (metal oxide semiconductor) device is given a depletion implant that is not readily visible to a copier, who would infer from a device's location in the circuit that it would be in enhancement-mode. Instead of disguising circuit elements, some systems have a mechanism to protect the circuit from operating until a correct access code has been entered, as described in U.S. Pat. No. 4,139,864 issued to Schulman and U.S. Pat. No. 4,267,578 issued to Vetter. However, each of the above protection schemes require additional processing and/or uses additional circuitry that is dedicated to security and does not contribute to the basic functioning of the circuit. This increases the cost of circuit production and complicates the circuitry.
Therefore, there still exists a need for a cost effective, easy to implement approach which can help prevent the reverse engineering of semiconductor integrated circuits and help protect developers and manufacturers against design piracy. The present invention provides such an approach.